Task. 9. Find the answers to these questions in the following texts

1. What is one of the main causes of a PC not running at its highest potential speed?

2. What word in the text is used instead of ‘buffer’?

3. What device looks after cache coherency?

4. What is the main alternative to ‘write-through cache’?

5. When does a write-back cache write its contents back to main memory?

6. When is data marked as ‘dirty’ in a write-back cache?

7. What determines what data is replaced in a disk cache?

Text 2B. CACHE MEMORY

Most PCs are held back not by the speed of their main processor, but by the time it takes to move data in and out of memory. One of the most important techniques for getting around this bottleneck is the memory cache.

The idea is to use a small number of very fast memory chips as a buffer or cache between main memory and the processor. Whenever the processor needs to read data it looks in this cache area first. If it finds the data in the cache then this counts as a ‘cache hit’ and the processor need not go through the more laborious process of reading data from the main memory. Only if the data is not in the cache does it need to access main memory, but in the process it copies whatever it finds into the cache so that it is there ready for the next time it is needed. The whole process is controlled by a group of logic circuits called the cache controller.

One of the cache controller’s main jobs is to look after ‘cache coherency’ which means ensuring that any changes written to main memory are reflected within the cache and vice versa. There are several techniques for achieving this, the most obvious being for the processor to write directly to both the cache and main memory at the same time. This is known as a ‘write-through’ cache and is the safest solution, but also the slowest.

The main alternative is the ‘write-back’ cache which allows the processor to write changes only to the cache and not to main memory. Cache entries that have changed are flagged as ‘dirty’, telling the cache controller to write their contents back to main memory before using the space to cache new data. A write-back cache speeds up the write process, but does require a more intelligent cache controller.

Most cache controllers move a ‘line’ of data rather than just a single item each time they need to transfer data between main memory and the cache. This tends to improve the chance of a cache hit as most programs spend their time stepping through instructions stored sequentially in memory, rather than jumping about from one area to another. The amount of data transferred each time is known as the ‘line size’.

If there is a cache hit then the processor only needs to access the cache. If there is a miss then it needs to both fetch data from main memory and update the cache, which takes longer. With a standard write-through cache, data has to be written both to main memory and to the cache. With a write-back cache the processor needs only write to the cache, leaving the cache controller to write data back to main memory later on.